Tutorial on Partial Reconfiguration of Image Processing Blocks using Vivado & SDK

PRLAb by Nishmitha Naveenchandra Kajekar from Marios Pattichis on Vimeo.

This is a tutorial which describes how to create a Reconfigurable Partition and implement two Reconfigurable module designs. The two image processing modules used are Sobel Edge Detector and Gaussian Filter. MATLAB is used for converting image file to text file. Vivado IPI and Software Development Kit is used to create a reconfigurable peripheral using ARM Cortex-A9 processor system on Zynq.

Figure. Design Architecture

Requirements

The tutorial assumes the following setup.

• Hardware Tools:
  • ZedBoard (Zynq Evaluation and Development)
• Software Tools:
  • Vivado Design Suite 2015.2
  • Xilinx Software Development Kit 2015.2
  • MATLAB
  • Terminal program (Teraterm)
• Licensing:
  • Xilinx Partial Reconfiguration
• Required Files:
  • PRLab.zip
  • Other Required Files
• Report
• Presentation

(Courtesy of Robert Bernard Kent: The tutorial has also been verified to work with Vivado Design Suite 2015.4)

Design Procedure:

These links given below are the step-by-step explanation of the video given above to perform Partial Reconfiguration.
Step 0:PRLab Folder Explanation

Step 1:Convert Image file to text file

Step 2:Generate DCP's for Static and RM modules

Step 3:Load Static and one RM module for RP

Step 4:Define Reconfigurable Properties and Reconfigurable Partitions

Step 5:Create and Implement first Configuration

Step 6:Create and Implement second Configuration

Step 7:Create Blanking Configuration

Step 8:Run PR Verify

Step 9:Generate Bit files

Step 10:Generate Software Application
Step 11:Test the Design

Step 12:Generate image file from text file

Result:

The results obtained after testing the design on ZedBoard is shown below:

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