DRASTIC is focused on the development of adaptive video processing systems that can change in response to content, their environment, or user needs. The DRASTIC platform allows changes in both the software and the hardware that is used to process the videos.

DRASTIC architectures for digital image and video processing

By adapting to video content, user demands, or external constraints, DRASTIC can provide significant savings in 2-D filtering applications. Furthermore, as demonstrated in the Discrete Periodic Radon Transform (DPRT) paper, DRASTIC requires both fast and scalable implementations.

  1. Carranza, C., Pattichis, M.S., and Llamocca, D., “ Fast and Parallel Computation of the Discrete Periodic Radon Transform on GPUs, Multicore CPUs and FPGAs, ” 25th IEEE International Conference on Image Processing (ICIP), pp. 4158-4162, 2018.
  2. Carranza C., Llamocca D., and Pattichis M.S., “ Fast 2d convolutions and cross-correlations using scalable architectures,” IEEE Transactions on Image Processing, vol. 26, no. 5, pp. 2230-2245, 2017.
  3. Carranza, C., Llamocca, D., and Pattichis, M.S., “Fast and Scalable Computation of the Forward and Inverse Discrete Periodic Radon Transform,” IEEE Transactions on Image Processing, vol. 25, no. 1, pp. 119-133, Jan. 2016.
  4. Llamocca, D. and Pattichis, M.S., “ Dynamic Energy, Performance, and Accuracy Optimization and Management for Separable 2-D Filtering for Digital Video Processing,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 4, article 30, 30 pages, Jan. 2015.

DRASTIC architectures for digital video communications

We developed DRASTIC methods for both HEVC and traditional JPEG implementations.

  1. Antoniou C.Z, Panayides A.S, Pantziaris M, Constantinides A.G, Pattichis C.S, Pattichis M.S, "Real-Time Adaptation to Time-Varying Constraints for Medical Video Communications" IEEE journal of biomedical andhealth informatics, no. 99, pages 1-1, 2017.
  2. Llamoca D. "Self-reconfigurable architectures for HEVC Forward and Inverse Transform" Journal of Parallel and Distributed Computing vol. 109, pages 178-192, 2017.
  3. G. Esakki, V. Jatla and M. S. Pattichis, "Adaptive High Efficiency Video Coding Based on Camera Activity Classification," 2017 Data Compression Conference (DCC), Snowbird, UT, 2017, pp. 438-438.
  4. G. Esakki, V. Jatla and M. S. Pattichis, "Optimal HEVC encoding based on GOP configurations," 2016 IEEE Southwest Symposium on Image Analysis and Interpretation (SSIAI), Santa Fe, NM, 2016, pp. 25-28.
  5. Jiang, Y., Zong, C., Pattichis, M.S., “Scalable HEVC Intra Frame Complexity Control Subject to Quality and Bitrate Constraints,” invited, 3rd IEEE Global Conference on Signal & Information Processing, Orlando, Florida, 2015.
  6. Antoniou, Z., Stavrou, S., Panayides, A.S., Kyriacou, E., Constantinides, A., Pattichis, M.S., Spanias, A., and Pattichis, C.S., “ Adaptive Emergency Scenery Video Communications using HEVC for Responsive Decision Support in Disaster Incidents,” 37th IEEE EMBC, pp. 173-176, 2015.
  7. Panayides, A., Constantinides, A., Kyriacou, E., Pattichis, M.S., and Pattichis, C.S., “ Adaptive Real-time HEVC Encoding of Emergency Scenery Video,” 4th International Conference on Wireless Mobile Communication and Healthcare, MobiHealth 2014, p. 217, Nov. 3-5, 2014.
  8. Jiang, Y. and Pattichis, M.S., “ A Dynamically Reconfigurable Architecture System for Time-Varying Image Constraints (DRASTIC) for Motion JPEG,” 17 pages, Journal of Real-time Image Processing, 2014.
  9. Yuebing Jiang, Daniel Llamocca, Marios Pattichis, and Gangadharan Esakki, “A Unified and Pipelined Hardware Architecture for Implementing Intra Prediction in HEVC,” IEEE Southwest Symposium on Image Analysis and Interpretation, San Diego, California, 2014.
  10. Yuebing Jiang, Gangadharan Esakki, Marios Pattichis, “Dynamically Reconfigurable Architecture System for Time-varying Image Constraints (DRASTIC) for HEVC Intra Encoding,” Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California,2013.

DRASTIC teaching material

The following tutorial has been developed by Ms Nishmita Naveenchandra Kajekar (email, LinkedIn) at University of New Mexico:

Partial Reconfiguration
Tutorial on Partial Reconfiguration on ZedBoard using Xilinx tools

The following tutorials have been developed and taught by Prof. Daniel Llamocca at Oakland University:

VHDL Coding for FPGAs
Fundamentals of VHDL and LUTs for efficient FPGA implementations.
Embedded System Design for Zynq SoC.
An introduction to Vivado for dynamic partial reconfiguration.
Fall 2015 - ECE495/595: Special Topics - Reconfigurable Computing
A complete course on reconfigurable computing including arithmetic circuits, pipelining, embedded systems in a SoC, and dynamic partial reconfiguration.


  1. System and Methods for Adaptive Optimization for Video Coding and Video Delivery,"
    Inventors: Marios S. Pattichis, Yuebing Jiang, Cong Zong, Gangadharan Esakki, Venkatesh Jatla, and Andreas Panayides, Patent filed on 07/31/2015.

    The patent application describes a novel method to support the optimal delivery of high efficiency video encoded (HEVC) video by adaptive encoding based on content, network bandwidth, or user expectations. It describes an important extension of the awarded U.S. Pattent 9,111,059 B2 on System and Methods for Dynamic Management of Hardware Resources described below. Refer to the architectures research projects and the (current) DRASTIC research project for applications.

    The patent is now available for licensing.

    UNM STC link to the HEVC video delivery patent.


Please refer to the ivPCL commercialization webpage.

Related research

Related research by ivPCL can also be found at the architecture projects website.


This material is based upon work supported by the National Science Foundation under NSF AWD CNS-1422031. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation.